Portapack-Carnage

◆ RCC_CFGR_PLLMUL48

#define RCC_CFGR_PLLMUL48   ((uint32_t)0x00200000)

#include <firmware/chibios/os/hal/platforms/STM32L1xx/stm32l1xx.h>

PLL input clock * 48 PLLDIV configuration